Documentation

Getting started

• circuitRF Quick Start Run a simulation and read a plot, for engineers who already use circuit simulators.
• Welcome to circuitRF! Libraries, cells, test benches and analyses, explained from the ground up.

Core concepts

• circuitRF Reference Guide The Reference Guide contents, and the in-app Help anchor scheme.
• The Workspace The workspace window: documents, tool panels, docking, and the folder behind it all.
• Settings The Settings dialog, tab by tab: launch, permissions, colour theme and wirebond defaults.
• Units DBU, display units, the snap grid, and how to type a value with an SI prefix.
• Expressions Variables, cell parameters, functions and conditionals — one expression language.
• Grid & Connectivity The schematic grid, wires, and how connectivity is decided.
• Pins, Ports & Terms Pin, Port and Term: three different things with three different jobs.
• File Formats Every circuitRF document type and what is inside it.
• History Everything circuitRF has kept of a workspace: the states it kept for you, the versions you kept on purpose, and how to go back to any of them.

Design

• The Schematic Editor Drawing a circuit: the palette, placing and wiring, and setting up the analysis that runs it.
• Components Every component in the standard library: symbol, purpose and parameters.
• Importing a SPICE Model Importing a SPICE .model card or .subckt: what is carried, what is not, and why.
• System Components The ideal blocks a system diagram is drawn out of, and where passive intermod comes from.
• Dynamic Symbols (SDD, ZPort, SnP) Components whose symbol changes with their parameters.
• Symbol Editor Drawing and editing a symbol.
• The SDD (Symbolically-Defined Device) The Symbolically-Defined Device: writing a nonlinear model as equations.
• The Nonlinear Capacitor & the C–V Editor C(V) as a Taylor series, and the C–V Editor that fits one.
• Compiled Verilog-A Models Running a compact model you supply, from Verilog-A source or a compiled artefact.
• The Match Component Direct synthesis of a bandpass matching network that absorbs both terminations.

Simulate

• Simulations DC, S-parameters, harmonic balance, parametric sweeps, loadpull and pursuit.
• Measurements Post-processing a run into named quantities.
• The Netlist (.cnl) Format The .cnl elaborated-netlist format.
• The Data Display Plots, tables, trace cards and markers.
• Derived Metrics Stability, passivity, group delay and the passive impedance readouts — with the equations.
• The WSProbe The WSProbe: nodal transfer functions for stability and in-situ design — with an appendix on stability itself.
• Plot Types Rectangular, Smith, Polar and Table — and which data each will accept.
• Results & Data Export Getting results out into Python, MATLAB or a Touchstone file.
• The Command Line Running every analysis headless: the verbs, their options and their exit codes.

Layout & EM

• The Layout Editor The layout view: technology, drawing, snapping, and the schematic it belongs to.
• Footprints SMT land patterns: case sizes, density levels, and how a part gets its artwork.
• Layout versus schematic Layout versus schematic: does the artwork implement the drawing, and what the report names.
• PCells Parameterised cells — placing one, driving it, and its parameter handles.
• PDK Integration Importing a kit and simulating the parts it supplies.
• PDK Authoring Authoring a kit: the OpenPDK layout, Python PCells, models and artwork.
• The Stackup The layers your board is made of - and which conductor is ground.
• The MoM Engine The planar method-of-moments solver: what it does, what it will not do, and how.
• EM Setup The EM Setup panel, control by control, and where the results land.
• Antennas Patch antennas: the pattern, the numbers that go with it, and the limits that bound both.

Tools

• Smith Chart Narrowband matching by hand: one curve per component, a handle on every joint, and the load moving as you drag.
• harmonicaRF Interactive harmonic load-pull on one device, at the speed of a mouse drag.
• wBond Bondwire arrays: geometry, the 3D kernel, and S-parameters out.
• railRF Power integrity on the board you drew: DC drop, Z(f) against a target, and which decaps earn their place.

Application notes

• circuitRF Application Notes Worked investigations of questions that come up on real boards.
• AN-01 — Coupled Lines, EM Ports, terminations and de-embedding AN-01: how to EM-simulate coupled lines - kernel choice, where the ports go, and how two coupled feeds are calibrated together.