circuitRF Quick Start
For engineers who already know circuit simulators. In a couple of pages: what circuitRF is, how it's organized, and how to run a simulation and see a plot.
What circuitRF is
circuitRF is a lightweight, cross-platform RF circuit simulator. If you've used a SPICE tool or a commercial RF/microwave EDA suite, you'll be at home — but the analyses and the workflow are built around the RF problem, not the time-domain transient problem. It is deliberately not a SPICE simulator.
Simulations available:
DC — operating point (linear and nonlinear), the bias prerequisite for HB.
S-parameters — linear multiport network parameters over a frequency sweep, with renormalization and embedded Touchstone (
.sNp) blocks.Harmonic Balance (HB) — steady-state nonlinear analysis, single- and two-tone, with power/source continuation for convergence at drive. Reports Pout, gain, efficiency, PAE, spectra, intermodulation.
Loadpull / sourcepull — a first-class experiment: sweep the source/load reflection coefficient over a Smith-chart grid and contour the figures of merit. Loadpull Pursuit automatically searches for the terminations that optimize a metric.
Parametric sweeps — wrap any analysis in one or more swept variables (available power, a bias voltage, a frequency, any user variable).
Data Display: results plot on rectangular, Smith, and polar charts, and in tables. Measured
data (Touchstone, .spl, .lpcwave) overlays simulated data on the same axes — a measured
loadpull contour plots exactly like a simulated one.
Every run writes its results as a NumPy .npy dataset (a named bundle of labeled,
unit-bearing arrays — the DataSet/DataCube model). You can plot it in
circuitRF or load it straight into Python/MATLAB. Export to .mat, Touchstone,
.spl, and .lpcwave is built in.
How a project is organized
circuitRF is a hierarchical, cell-based tool (like the commercial RF suites, not like a flat SPICE deck). The pieces:
Library — a collection of cells you can reuse and reference. circuitRF can reference several libraries at once.
Cell — a reusable building block with up to three views: a Symbol (the glyph drawn when the cell is instanced, and where its ports sit), a Schematic (the electrical contents), and a Layout (the physical artwork, drawn against a technology and simulated by the planar method-of-moments solver). A cell declares parameters that an instance can override — this is how hierarchy passes values top-down.
Hierarchy — a schematic can instance other cells as sub-cells. Push into a sub-cell to edit it, pop back out; an edit to a cell affects every instance.
TestBench — the thing you actually simulate: a top schematic plus its analyses and measurements.
You don't have to build a cell library to try something. Use File → New Schematic to open a standalone schematic — a scratch sheet you can wire up and simulate immediately, with no workspace or cell structure. Save it into a workspace later if it's worth keeping.
The workspace window
A workspace is a folder holding a .cws file and a folder per cell — membership is the
filesystem, so the Project panel is showing you what is on disk. Open one and you get the window
below: documents in tabs down the middle, tool panels docked around them.
Everything in it is movable. Drag a tab to reorder it, against an edge to split the area, or clear of
the window to float it; drag a tool panel by its tab to re-dock it anywhere. View ▸ Hide Dockers
(Ctrl/⌘+Shift+H) gives the whole window to the documents and back again, and
View ▸ Reset Layout restores the arrangement you chose in Settings. The arrangement is saved into
the .cws, so a workspace reopens the way you left it.
Region by region, panel by panel: The Workspace.
Build a schematic: components, wires, the pin grid
The short version is below. The editor in full — the Library Palette, every toolbar button, the context menu, and setting up the analysis that runs the circuit — is The Schematic Editor.
- Place a component. Click a tile in the Library Palette (or drag it onto the canvas). A ghost follows the cursor; click to drop. The tool stays armed so you can place several. Press R to rotate the ghost, Esc to stop placing.
- Wire it up. Press W (or the Wire button) and click from one pin to another. Enter or double-click finishes a wire; Esc cancels it.
- Edit a value. Double-click a component's value label right on the
schematic to edit it inline — type
50 Ω,1.2 nH,2 GHzand press Enter. (Double-clicking the body opens the full parameter editor.)
Connections are exact, not fuzzy. Every component pin, wire vertex, and junction lands on the connection grid (the coarse grid), and two things are connected only when they sit on the same grid point. A separate, finer authoring grid positions labels and annotations. Keep pins on the connection grid and wiring "just works"; a red marker flags an unconnected pin.
Pins vs. Ports vs. Terms
Three things sound similar but do different jobs. The distinction matters because it controls what becomes an external interface versus an excitation/measurement point:
| Concept | What it is | When you use it |
|---|---|---|
| Pin | An interface terminal of a cell. Pins on a cell's symbol are how the cell connects to the parent schematic that instances it. Connectivity only — no electrical model. | Inside a cell you intend to reuse hierarchically, to expose its connection points. |
| Term | An S-parameter port termination — a numbered reference-impedance port (default 50 Ω). Each
Term carries a Num (port index). |
On a test bench, to define the ports an S-parameter analysis measures between. |
| Port | The general term for an external connection point. In a cell a port is realized by a Pin; in an S-parameter test bench a port is realized by a Term. | Conceptually — "this circuit is a 2-port." How you realize it depends on the context above. |
The Reference Guide has a fuller treatment with diagrams; for Quick Start: use Term to define S-parameter ports on a test bench, and Pin to expose a reusable cell's connections.
Run a simulation
- Open Simulate → Setup Analyses… (or the Analyses panel) and add an
analysis (e.g. S-Parameter, 1–10 GHz).
For an HB example, add Harmonic Balance and drive the input with a
P1Tone(available-power) source. - Press Run ▶. circuitRF extracts a netlist from the schematic, elaborates it, and runs the analysis on a background thread.
- The run writes
results/<name>/run.npy. Open Data Displays that are already showing this result refresh automatically.
See the result on the Data Display
- Open a Data Display (Ctrl/⌘+Shift+D) and add a plot — Rectangular, Smith, Polar, or Table.
- In the trace card, pick the data source (your run), then the signal — e.g.
S(2,1). On a rectangular plot choose a transform such asdB20; on a Smith chart the complex value plots directly. - For loadpull, choose the loadpull run and a contour metric (Pout, PAE). The optimum (max-power / max-efficiency) markers and interactive markers read values off the contour surface.
Headless / command line
The engine runs without the GUI — useful for scripting and batch sweeps. From a .cnl netlist (a
human-readable circuit description):
$ circuitrf sparam mycircuit.cnl --freq 1GHz:3GHz:50MHz -o mycircuit.s2p
This reads the netlist, runs the S-parameter analysis, and writes a Touchstone file. (Make sure
the circuit's port count matches the extension, or omit -o to let circuitRF name it .sNp
automatically.)
Every analysis runs this way, not just S-parameters — dc, hb (harmonic balance), lp and
lpp (loadpull and pursuit), and em, which runs an EM setup and
writes the same files the Simulate button writes. Results go to stdout and progress to stderr, so a
long run can be piped and watched at the same time. The full reference is
The Command Line.
Ready to draw something for real? The Schematic Editor covers placing, wiring and analysis setup in full, and Simulations covers every analysis type. New to circuit simulators in general? The New User's Guide starts from first principles. Need exact parameters, algorithms, or the netlist format? See the Reference Guide.