circuitRF Reference Guide

The Layout Editor

Drawing artwork: the technology, the tools, snapping, and the schematic it belongs to.

The layout view holds a cell's physical geometry — the shapes that get manufactured. It serves two consumers that pull in slightly different directions, and it is worth knowing which one you are serving at any moment:

Orientation

circuitRF - Layout editor EM Layer: Bottom Copper Technology: PCB 2-Layer Unit: mil Snap: 1 mil Shapes: 4 Instances: 0 Extent: 11.811 × 10.6299 mil X: — Y: — -6 -4 -2 0 2 4 6 8 10 12 14 16 18 -4 -2 0 2 4 6 8 circuitRF - Layout editor EM Layer: Bottom Copper Technology: PCB 2-Layer Unit: mil Snap: 1 mil Shapes: 4 Instances: 0 Extent: 11.811 × 10.6299 mil X: — Y: — -6 -4 -2 0 2 4 6 8 10 12 14 16 18 -4 -2 0 2 4 6 8
The layout editor: a microstrip run with a mitred bend, a crossing stub and a ground via.

A layout is a view of a cell, exactly as its schematic and its symbol are. The cell folder holds schematic/, symbol/ and layout/ side by side, and a cell need not have all three. The project tree shows them together; opening one opens a document tab. The other two views have their own editors and their own pages: the Schematic Editor for the electrical contents, and the Symbol Editor for the glyph an instance draws.

Coordinates are integers in database units, and the display unit you read them in is a separate, free-to-change setting. That distinction is the single most common source of early confusion and it has its own page: Units.

The technology

A layout resolves against a technology — a .ctech file that holds everything true of the process rather than of one cell:

Technologies live in a tech/ folder at the workspace root, and the workspace records which is the default. A layout stores a relative reference to one, or leaves it blank to mean "the workspace default".

"The workspace" means the document's workspace

A blank technology reference resolves against the workspace containing that layout file — found by walking up from the file to the nearest .cws — not against whichever workspace happens to be open. This matters because the starter technologies use the same low layer keys starting at (1,0), so resolving against the wrong one would silently reinterpret every layer in the design.

Two starter technologies ship. They differ only in data, never in code path:

PCB starter MMIC starter
Display unit / snap mil / 1 mil µm / 5 nm
Layers Top & Bottom Copper, Soldermask ×2, Silk ×2, Drill, Outline Metal1, Metal2, Via, Resistor, Cap Dielectric, Nitride, Substrate, Backside Via, MIM Metal, MIM Via
Stackup 1.6 mm FR-4, εr 4.4, tanδ 0.02, 1 oz copper, bottom ground 100 µm GaAs, εr 12.9, tanδ 0.0006, 3 µm plated gold, backside ground
Primary interchange Gerber + Excellon GDSII

The MMIC starter also carries a thin-film (MIM) capacitor module — a MIM Metal plate, a MIM Dielectric under it and a MIM Via up to Metal2, with two matching drawing layers. It costs plain interconnect work nothing, because the capacitor dielectric is tied to its plate: a run with no plate artwork in it carries air in the film's place and extracts exactly as it did before the module existed. Draw a capacitor and the film is real. See A thin-film (MIM) capacitor, which also explains why you should not read a capacitance off a raw run.

A layer's colour is literal user data, not a theme role: "M2 is teal" is a fact about the process that must survive a light/dark switch and must match what you see in your other tools. The editor's own chrome — background, grid, rulers, selection, handles — does follow the theme.

A missing technology does not block you. Layers render from a generated fallback palette keyed by their (layer, datatype) pair, a warning is posted, and editing proceeds. The one thing it does block is an EM run, which refuses rather than inventing a stackup.

Drawing and editing

Drawing tools: Select · Rect · RoundedRect · Circle · Polygon · Curve · Path · Label · Port · Instance-place · Array · Ruler.

Curves, circles and rounded rectangles are first-class primitives — they are stored as curves, not as pre-flattened polygons — and are flattened on demand, always with an explicit tolerance prompt, and automatically on GDSII export.

Edit operations: boolean Union (grouped per layer — one result per distinct layer in the selection), Intersect / Difference / XOR (which need a same-layer pair to enable), Size (grow or shrink by a signed offset), Scale (a numeric factor or a target size, plus bounding-box handles: corner for uniform, side for one axis), Clip and Cut Out (and their All forms), Align and distribute, Move to layer, Set net, Flatten to Polygon…, Flatten Hierarchy and Group into cell.

Clip and Cut Out are not Intersect

Intersect is the region shared by all the selected shapes, folded across the whole selection — so a selection holding any two shapes that do not overlap intersects to nothing. That is the right answer to the question it asks, and it is almost never the question you meant when you drew a rectangle over a region of interest.

Clip and Cut Out ask the other one. Draw the region, select the shapes you want clipped, then right-click the region and choose Clip (keep what is inside it) or Cut Out (keep what is outside). Both name the shape they found under your click in their tooltip, so you can check your aim before you commit to it. Every selected shape is clipped on its own and keeps its own identity, layer and net, so the operands may sit on any mix of layers. The right-clicked shape is the stencil, not an operand: it is never clipped against itself and it survives the operation, so the same rectangle can clip a second layer straight afterwards. Nothing you did not select is touched, on any layer.

Clip All and Cut Out All sit directly below them and skip the selecting: they use every shape in the cell, whatever is selected. That is usually what you want when you have imported a board and the answer to "which shapes?" is "all of them" — draw the region, right-click it, done. Their tooltip gives the shape count, so you can see the size of what you are about to do before you do it. They obey the layer list exactly as Ctrl+A does: a layer you have hidden, or switched selection off for, is left alone — and the Messages panel says how many shapes that was, along with any bitmaps and placed instances, which are not geometry and are never clipped. All four are a single undo.

The two "flatten" commands are different operations

Flatten to Polygon turns a curve into a polygon and always asks for the tolerance. Flatten Hierarchy turns a placed instance into geometry in this cell. They are labelled distinctly for that reason — "Flatten" alone gets misread.

Every command either does something or is disabled with a stated reason. Context-menu items are disabled rather than hidden, so their positions stay stable, and a disabled item's tooltip names the condition — "Select 2 or more shapes on the same layer". A command that is legitimately enabled but changes nothing in a particular case (a union of shapes that do not touch) reports that through the Messages pane rather than appearing to fail.

Selection and vertex editing

Repeated clicks at the same point cycle through overlapping shapes. The order is layer Z-order descending, then ascending area — so a small shape sitting on a large one is reachable, which is the case that actually matters. The status bar shows where you are: Rect · M2 · 2 of 5. Alt-click is the explicit "next candidate" for anyone who expects it.

With exactly one shape selected you get handles: square handles on vertices, round handles at polygon edge midpoints. Hit priority is strict — vertex handle, then edge handle, then edge line, then shape interior — because getting that order wrong makes vertex dragging feel broken.

Gesture Effect
Drag a vertex Move it, snapped and angle-mode constrained
Drag an edge Translate that edge perpendicular to itself, preserving the adjacent edges' directions — this is what makes "widen this trace" one gesture
Ctrl/Cmd-click an edge Insert a vertex there
Delete on a selected vertex Remove it (blocked below three vertices)
Drag the interior Move the whole shape

Curved shapes get their own handles. An arc edge shows a midpoint bulge handle — drag perpendicular to the chord to change the radius, past the chord to flip the sweep, which is the fastest way to radius a corner. A cubic edge shows two control points with tangent lines drawn to their anchors; a circle shows a radius handle; a rounded rectangle shows corner-radius and bounding-box handles. Right-click an edge to convert it between Line, Arc and Cubic, so a polygon can grow a curve without being redrawn.

Self-intersection is allowed during a drag, flagged on release, and offered an automatic repair — it is not rejected mid-gesture.

Pasting between cells carries the source layout's own resolution and layer definitions with it. Same DBU pastes as-is; a different DBU rescales by the exact ratio, and warns through Messages naming the offending shapes if the ratio would round. Layers absent from the destination technology are offered for adding or mapping — never silently dropped.

Hierarchy, instances and arrays

Hierarchy here is the same idea as in the schematic, on the same cells. Read Hierarchy in the Schematic Editor once; everything it says about making a cell, placing it and pushing into it holds in this view, on the cell's layout instead of its schematic. Push in and pop out are the same two toolbar buttons, the same ⌘] / ⌘[, and the same clickable breadcrumb. Pop Out also leads the canvas context menu, greyed out with its reason when you are already at the top level.

Three things are the layout's own:

Finding an instance

On a board with hundreds of parts, Design ▸ Find Instance… — ⌘F / Ctrl+F — is the quick way to one of them. It opens the Instances panel for the layout you are working in, with the cursor in its search box. Each placed instance is listed by its designator (or, for one that has none, the name of the cell it places), its type — the PCell generator or the part it was placed as, otherwise the cell — and the cell itself where that adds something, including an array's rows × columns.

Type part of a designator to filter, pick a type to narrow further, and double-click a row — or press Enter — to zoom to that instance and select it. An instance whose cell no longer resolves is still listed and still zoomed to, at its placement point: that is often exactly why you are looking for it. As in the schematic, only the level you are looking at is listed unless you tick Include sub-cells: then every instance inside every placed cell is listed too, by path (U1.U2), and double-clicking one pushes down to it. A parametric cell is listed but not searched inside — its geometry is generated. The panel works identically for a schematic — see Finding a component.

Schematic ⇄ layout

Two commands under the Design menu move work between the two views. They are deliberately symmetric, and neither ever runs by itself — there is no save hook, no open hook, no activation hook. They run when you invoke them and at no other time.

Update Layout from Schematic

⌘U. Walks the schematic's instances, resolves each cell's layout view, and emits a starting layout:

  1. Each component instance resolves its layout view. A stated footprint is consulted first — an SMT case size, an imported part or your own .clay (see Footprints) — then a kit reference, then a cell reference, then a registered PCell generator, whose layout is generated rather than stored (see PCells).
  2. Components with no layout view at all — VAR, MEAS, Ground, and any un-laid-out cell — are reported to Messages and skipped, not silently omitted.
  3. Instances are placed in a packed, non-overlapping arrangement, roughly following schematic order.
  4. Net names are carried onto instance pins, and a ratsnest is drawn: thin straight lines on a system layer between pins sharing a net. That is the guide that makes manual routing tractable.
There is no auto-router, and there is not going to be one

Step 3 places parts. It does not route them. Auto-routing is a separate multi-month product and pretending otherwise would set the wrong expectation.

Re-running updates, it does not duplicate. Each generated instance remembers the schematic component's stable id, so a second run keeps and leaves in place what is already there, adds what is new, and reports — never auto-deletes — what no longer exists in the schematic. You will hand-place after the first generation and run it again after a schematic edit; a generator that stomped your placement would be one you used exactly once.

Where the layout is written. A schematic in a cell's schematic/ folder writes that cell's layout/ folder. A schematic saved loose — at the workspace's root, say — writes its layout beside it, under the same name: PDN1.csch updates PDN1.clay in the same folder. Update Schematic from Layout follows the same rule in the other direction.

Update Schematic from Layout

⇧⌘U. The mechanical inverse: it walks the layout's instances and writes the schematic to match. Same file targeting (create the view if absent, open it, focus it, and leave a differently-named primary alone with a report), same change report, one undoable action.

What moves in this direction depends on what the instance is:

Instance in the layout What reaches the schematic
A PCell — an MLIN whose W and L you dragged The component and its parameters. This is how a layout-driven edit gets back into the circuit.
An ordinary hierarchical cell — a hand-drawn cell placed in this layout A plain cell-reference component. There is no parameter for the layout to have moved.
A wBond Its arrays and loop heights, reconciled against the live design — see wBond.

A cell placed this way that has no symbol view at all would render as a bare box with no pins, so you are asked once — for the whole run, not once per cell — whether to generate symbols for them.

What cannot be represented in the other view

Neither direction wires anything: Update Schematic from Layout places and updates components and does not draw nets. And hand-drawn artwork in a layout has no schematic counterpart at all — only instances cross the boundary, never loose shapes. Both cases are reported, so the omission is visible rather than silent.

A layout-first PCell has no existing schematic parameter to inherit a unit from, so a newly created component's length-dimensioned parameters take the technology's own default display unit — mil on a PCB, µm on an MMIC die.

Geometry snap

Two different things are called "snap" and it is worth separating them before anything else.

What it is Control
Grid snap The pitch new and edited vertices land on. A property of the document. The Snap field in the toolbar; F9 toggles it
Geometry snap Snapping to a feature of existing artwork — a pin, a corner, a midpoint. The magnet toggle; F3 or S

Geometry snap is on by default, and Alt held during a gesture suppresses it — Alt never enables it, so the escape hatch is always in the same direction.

What it snaps to

Six feature kinds, in priority order, highest first:

Pin Corner / endpoint Intersection Midpoint Centroid Nearest Pin Corner / endpoint Intersection Midpoint Centroid Nearest
The six geometry-snap glyphs, each drawn by the editor's own renderer from a real query.
Priority Feature Glyph What it is
1 Pin A declared connection point — a PCell's own pin, or one recovered from imported artwork
2 Corner / endpoint A shape's vertex, or the end of an open path
3 Intersection Where two edges cross
4 Midpoint The middle of an edge
5 Centroid A shape's area centre
6 Nearest The closest point on an edge — no named feature, just "on this line"

The priority is what makes the behaviour predictable. The more intentional a feature is, the higher it ranks: when several candidates sit inside the capture radius at once — and near a corner they usually do — the one that wins is the one you almost certainly meant. A pin beats a corner, a corner beats a mere crossing, and "somewhere on this edge" is always the last resort.

The marker is drawn in the source layer's own colour, tinted for contrast against the canvas background. That is not decoration: geometry snap crosses layers, and without it you cannot tell which layer you are about to snap to.

The capture radius

The snap tolerance is not a setting

Geometry snap's capture radius is a fixed 8 device pixels, converted to DBU from the current zoom on every query. So it stays the same size on screen at every zoom level, and shrinks in real distance as you zoom in — which is what you want, because zooming in is how you ask for precision. The toolbar's Snap field is the grid pitch, a different quantity entirely; see Layout units and the snap grid.

Intersections are different, and are off by default

Intersections are computed live near the cursor, not indexed. Corners, midpoints, centroids and pins are properties of one shape, so they are cached per cell; an intersection is a property of a pair, possibly spanning two cells, two instances or two layers, and the number of pairs is quadratic. It is therefore computed on demand over a bounded set of candidates near the cursor.

Two consequences you will notice:

Turning either toggle recomputes the marker at the last known cursor position immediately — you do not have to jiggle the mouse to see the mode change take effect.

The Ruler

Ruler (D, or the ruler button on the toolbar) places a two-point measurement inside the layout: a line between two points with the distance between them drawn at its midpoint. Click once to set the first endpoint, move — the whole ruler previews, readout included, so you see the number before you commit it — and click again to set the second. The tool stays armed, because measuring is something you do several times in a row; Escape disarms it.

circuitRF - Layout editor EM Layer: Bottom Copper Technology: PCB 2-Layer Unit: mil Snap: 1 mil Shapes: 4 Instances: 0 Extent: 11.811 × 10.6299 mil X: — Y: — -6 -4 -2 0 2 4 6 8 10 12 14 16 18 -4 -2 0 2 4 6 8 2.4 mil 4.7 mil Δx 3.1 Δy 3.5 stub to bend 11.8 mil circuitRF - Layout editor EM Layer: Bottom Copper Technology: PCB 2-Layer Unit: mil Snap: 1 mil Shapes: 4 Instances: 0 Extent: 11.811 × 10.6299 mil X: — Y: — -6 -4 -2 0 2 4 6 8 10 12 14 16 18 -4 -2 0 2 4 6 8 2.4 mil 4.7 mil Δx 3.1 Δy 3.5 stub to bend 11.8 mil
Three ruler annotations on the same artwork: a trace width, a free-angle clearance carrying a caption and its dx/dy components, and a Scaled-text ruler across the whole run. A ruler is not geometry and never reaches a manufacturing file.

It serves two jobs. The first is the one you do a dozen times an hour while placing and routing: how far apart are these two things? — answered on the canvas, without a dialog and without touching the artwork. The second is annotation: a ruler stays where you put it, saves with the cell, and comes out in a copy-paste into a slide or a report, so a design review can point at a clearance rather than describe it.

Not the ruler strip along the canvas edge

The strips along the top and left of the canvas are chrome: they track the viewport, show a scale, and cannot be placed, saved or selected. Everything on this page is the in-design ruler, which is a different object with its own colours in the theme editor.

Placing one accurately

Both endpoints go through the editor's snap stack unchanged — grid snap and geometry snap, with the same markers, exactly as a Path vertex does. That is what makes the measurement trustworthy: an endpoint that lands 3 DBU short of a corner reports a number that is wrong in a way nobody notices.

Shift locks the second endpoint to horizontal, vertical or 45°. It is not governed by the document's angle mode — a Manhattan document is a statement about manufacturable artwork, and the diagonal gap between two Manhattan traces is exactly the measurement you most want. Geometry snap outranks the Shift constraint when a snap feature is in tolerance, because a snapped endpoint is a stronger statement of intent than a held modifier. A ruler whose endpoints coincide after snapping is discarded rather than committed.

What the readout says

Three parts, top to bottom, each independently omittable:

   ╱
  ╱  3.59 mm             the distance — always shown, never editable
 ╱   Δx 2.54  Δy 2.54    when Show components is on
╱    bond wire span      when a Caption has been typed

The distance is computed and cannot be typed over. A ruler whose number can be overwritten is not a measurement, and in a design review it is worse than no ruler at all — the caption is the free text. It renders in the document's own display unit, with a decimal count and number format you can set, so switching the document from mm to mil re-renders every ruler with no stored value changing. The text is always drawn upright regardless of the ruler's angle, and is offset clear of the line.

Fixed and Scaled text

One property, two honest behaviours, chosen per ruler:

Mode The text is Use it for
Fixed (default, 11 pt) n points on screen, the same size at every zoom Temporary measurement — zoom out to the whole board and the readout is still legible
Scaled a physical height in the layout, like a label Annotation — the ruler keeps its proportion to the artwork, so a review figure reproduces at any scale

The Properties panel shows one size field whose label and units follow the mode. Both values are stored, so switching modes and switching back does not destroy the other one's setting. A multi-selection whose modes differ disables the field rather than guessing — set them all to one mode first, which is itself a single multi-edit.

Selecting, editing, deleting

Rulers select like anything else: click the line, either endpoint, or the readout text — clicking the number is the affordance most people reach for. Move, nudge, delete and copy all work, and a mixed selection of shapes, instances and rulers still moves and deletes as one undo entry. Drag an endpoint to re-measure. The Properties panel edits both endpoints numerically, the size mode and size, the font style, the decimals and number format, the caption, the Δx/Δy toggle and the readout's own position and alignment.

Right-clicking one offers Edit Ruler…, Reset Ruler Label Position, Delete Ruler and Clear All Rulers (Ctrl+K). A per-document Show Rulers toggle hides them all without deleting anything; it is view state and is deliberately not saved in the .clay.

A ruler is not geometry

This is worth stating plainly, because it is the guarantee the feature is built on. A ruler is not a shape. It lives in its own collection in the cell file, it has no layer, it obeys no layer visibility, and nothing that walks the layout's shapes — GDSII, Gerber, Excellon, board export, booleans, offset, flatten, DRC, the EM mesher — can see it. A dimension line etched in copper is a scrapped board; the only way to make that impossible is for the annotation never to be in the collection those writers read.

The two places it does come out are the two where a measurement is the point:

Interchange

File ▸ Import offers GDSII, DXF, Gerber and Board; File ▸ Export offers the same four.

Every export says what it could not carry at full fidelity before it writes anything, and that preview is produced by running the real write into a null stream — so it can never disagree with what lands on disk. Imports report the same class of thing afterwards, in the Messages panel: what was skipped, by type, with a count.

A layer is identified by its integer (layer, datatype) pair, not by its name — that is GDSII's model and it is the right one, since names are for humans and change, while the numeric pair is what a fab's process assumption is keyed to. DXF and board files are name-keyed instead, so bringing one in goes through an explicit name↔pair mapping held in the technology; one shared mapping dialog serves every import that needs it. Gerber has no layer concept at all — one file per layer — so the mapping is declared on the way out and reconstructed on the way in.

GDSII

Import and export. Hierarchy is preserved — one structure per cell, instances stay instances, and a board with four hundred identical parts stays four hundred instances rather than four hundred copies of geometry. Curved primitives are flattened to polygons and holes are keyholed, both because the format has no other representation; the export report counts each. Vias export as barrel plus landing pad, and a via with no landing layer exports its barrel only and is named in the report.

DXF

Import and export. The exporter writes R2000 (AC1015), R2004 (AC1018) or R2018 (AC1032), selectable, defaulting to AC1032. The choice is about colour, not geometry: every entity circuitRF emits — LWPOLYLINE with bulge, LINE, ARC, CIRCLE, ELLIPSE, SPLINE, HATCH, TEXT, INSERT, BLOCK — exists unchanged in R2000, but 24-bit true layer colour (group 420) arrived in R2004 and R2018 carries the identical capability. Choose R2000 only if a downstream tool refuses the newer header, and accept nearest-index colour when you do. R12 is deliberately not offered — it has no LWPOLYLINE, no ELLIPSE, no SPLINE and no HATCH, so writing it would mean flattening arcs and losing hole fills.

Arcs are never flattened on DXF export. circuitRF's own bulge convention and DXF's are the same quantity, so an arc edge exports by copying the number.

Rulers export here and only here, as real aligned DIMENSION entities on a layer named RULER, so the recipient can freeze or delete every one of them at once. A DIMENSION rather than a line plus some text, because loose geometry does not report a measurement, does not update if the recipient stretches the drawing, cannot be styled, and does not appear in anything that enumerates dimensions. A Fixed-size ruler has no meaning in a world-coordinate drawing with no screen, so its point size is resolved once, at export, to the height that occupies the same fraction of the drawing that its point size occupied of a nominal viewport — legible when the recipient zooms to extents, which is what the mode meant on screen.

Gerber and Excellon

Import and export. A board goes out to the fab house as artwork plus drill, and the same set comes back in as a cell you can edit, crop and mesh — your own, or someone else's.

Export

One Gerber file per layer, plus an Excellon drill file. Arcs are native (G02/G03) and a hole is a clear region, so neither is a lossy conversion; the pre-flight report lists only genuinely structural changes. A bare circle drawn directly on a drill-function layer still contributes a drill hit — it is never silently dropped — but it is unpaired: no matching pad, no annular-ring data, and the report suggests Convert to Via for it.

Import — File ▸ Import ▸ Gerber…

Point at a folder and you get the whole board. Point at a single file and circuitRF asks whether its folder was the real intent, telling you what that folder holds — one Gerber file is one layer, with no drill data, no other copper and no board outline, which is occasionally what you want and usually not. The folder is the default. There is a third option for pointing at a different folder outright, and Cancel creates nothing.

What a file is gets decided by content, never by extension. Anything in the folder that is not artwork or drill data is skipped and named in the summary, so a folder of mixed junk is safe to point at.

Which layer is which comes from the strongest source available, in this order:

  1. the .gbrjob job file, if the set has one — it settles set membership and identity together, and carries the stackup;
  2. the file's own X2 attributes (%TF.FileFunction), which also give the copper's position in the stack;
  3. a GerberSuffix in your technology that matches the file's extension — this is what closes the loop on a set circuitRF itself exported;
  4. a generic name heuristic (copper top/bottom/inner, mask, silk, paste, outline, drill);
  5. the shared layer-mapping dialog for anything left.

The summary reports which rung identified each layer, and flags the ones that came from the heuristic — that is the rung that can be confidently wrong.

Drill data. Excellon files often do not say what their numbers mean, so units and zero suppression are inferred from the format comment, the INCH/METRIC word, M71/M72, the tool diameters, and a cross-check of where the hits land against the artwork's own bounding box. You are only prompted when that inference actually had to guess or the cross-check disagrees, and the prompt shows you the evidence. Cancelling it cancels the import — a board read at the wrong scale is the worst kind of silent failure.

Vias are rebuilt wherever a drill hit and a copper flash share a coordinate exactly: pad diameter, drill diameter, barrel and landing layer, back to a real ViaShape. Unpaired hits become circles on the drill layer, counted in the summary — a lot of them usually means the artwork and the drill file do not belong to the same board. Where the files declare via-vs-component drilling (X2 ViaDrill / ComponentDrill) that declaration is used; where they don't, the two are genuinely indistinguishable from artwork alone and both come back as vias, and the summary says so.

What you get is one flat cell — Gerber has no hierarchy, and reconstructing footprints from artwork would be guesswork — inside its own import folder, with its own new .ctech. Your workspace technology is read but never modified.

The stackup is built from the job file when there is one, and from the artwork when there is not — the number of coppers, their order, and which drawing layer each is bound to were all worked out by the import already. What no Gerber file states at all is the substrate, and rather than leave it blank circuitRF fills it in with one ordinary FR-4 board: 35 µm outer copper, 18 µm inner, εr 4.4, tan δ 0.02, and the dielectrics sharing out the board thickness the files state — or 1.778 mm when they state none.

Every one of those numbers is named in the import summary, in a paragraph of its own, kept apart from the paragraph reporting what the files actually said. They are guesses about a board circuitRF has not seen, and they exist so a board can be opened and looked at rather than hand-typed before anything can run. Check them against your fabricator's stackup before you trust an EM result, on the Technology Editor's Stackup tab. Nothing is ever inferred from the material names in the files.

The summary also says what is still needed before the EM path can run — the one thing no artwork file can answer is which copper is the ground plane — and reminds you to crop the region of interest first: a whole board is not a MoM problem.

Also worth reading in the summary: the stroke count per layer. A copper pour that arrived as a few thousand parallel strokes is correct artwork but is neither editable copper nor meshable; Merge fixes it, and the summary names the layer and the count.

What a round trip does and does not preserve

Export → import is not lossless, because the format has no such types — but it is closed after one pass: whatever the first cycle collapses, every later cycle preserves exactly, byte for byte.

Leaves as Comes back as
rectangle, rounded rectangle, curve polygon
label polygons (labels become geometry on export)
path with a non-round end style region
via via — but only if the drill file came too
a layer using clear polarity composited polygons; individual shape identities gone

Circle and rectangle flashes, round-capped strokes with their width, arcs, holes, nets and multiple drill diameters all survive intact.

Refused rather than mangled, each by name: negative image (%IPNEG), non-identity mirror, scale or rotation, block apertures (%AB), a file with no coordinate format or no units, a binary drill file, a drill listing mistaken for a drill file, and anything over the 500,000-entity import ceiling. Anything read but degraded — a stroke with a non-circular aperture, a moiré macro primitive, a routed arc — is counted by name in the summary rather than dropped quietly.

Board files (.kicad_pcb)

Import and export, through File ▸ Import ▸ Board… and File ▸ Export ▸ Board….

Which versions

Import branches on the tokens present, never on the version stamp, and no file is refused for its version. That is not a stylistic preference: four epochs of one real board were measured, and the spellings are mixed within a single file — at the newest epoch every footprint line carries (stroke (width W)) while a graphic polygon still carries a bare (width W). The layer table moves too (B.Cu is ordinal 31 in older files and 2 in the newest), and in the oldest a renamed layer's user name occupies the canonical name slot, so a file may contain no string F.Cu at all. Everything therefore resolves through the file's own layer table, and "is this copper" is that table's type word — never a name and never an ordinal range. The epoch is reported in the import log, so you can see what circuitRF thought it was reading.

Epoch Stroke width Arcs Fill flag Nets
20171130 (width W) centre + angle absent (net 7) + a top-level table
20211014 (width W) three-point (mid x y) (fill none / yes) (net 7) + a table
20221018 (stroke (width W) …) three-point (fill none / yes) (net 7) + a table
20260206 (stroke (width W) …) three-point (fill no / yes) (net "GND"), no table

Export writes one dialect, 20221018, and does not offer a choice. A reader has to accept files of every epoch because they arrive unbidden; a writer has the opposite problem, and must pick one every downstream reader accepts. 20221018 is late enough to be free of design rules and net classes — those left the board file at the 20211014 epoch — and early enough that every later release still opens it.

What comes across

Board-level geometry and footprint geometry are both handled; a footprint's items are in its own frame and compose through its placement, at an arbitrary angle, with a back-layer part being a mirror combined with that angle.

In the board file Becomes, in circuitRF
segment (track) a path, round-ended, carrying its net
arc (three-point) a path with a single arc edge — the bulge is exact, not sampled
via a via primitive: barrel on a drill layer, pad on the landing layer
gr_line a two-point path at the stroke width
gr_rect, filled / unfilled a rectangle / a path tracing the four edges at the stroke width
gr_circle, filled / unfilled a circle / an annulus at ± half the stroke width
gr_arc a path with one arc edge
gr_poly, filled / unfilled a polygon / an outline path
gr_curve, bezier a curve or path with a cubic edge
gr_text a label
zone → filled_polygon polygons, with their holes
footprint / module one generated cell per distinct definition, one instance per placement
pads: circle, rect, oval, roundrect, trapezoid, custom real copper geometry — see below
images, dimensions, groups, tables, tuning patterns, teardrops skipped, reported by type with a count

Pads are the fiddly part and are handled by shape, not approximated by a bounding box. A roundrect becomes a rounded rectangle; one carrying a chamfer — corners cut rather than rounded, at the chamfer ratio times the pad's short side — or one rotated off a cardinal angle builds the general boundary instead, straight edges plus quarter-circle arc edges. A trapezoid honours its own offset, which puts copper beyond the nominal size on one side and inside it on the other. A custom pad is its anchor shape unioned with every one of its primitives, all of them — taking the anchor alone frequently left no copper at all under the pin. An oval drill is drawn as the slot it is.

Three import rules that exist because getting them wrong is silent

What does not come across, either way

Both directions have a hard entity ceiling and refuse before allocating rather than dying partway through and leaving a half-imported layout or a half-written file that opens and is wrong. Coordinates are decimal millimetres with no exponent notation; at the default 1000 DBU/µm one DBU is one nanometre, so six decimal places represent every DBU exactly — this is the one interchange path here that is lossless in both directions.

Design-rule checking

Design ▸ Check Design Rules, or the Check button on the DRC panel. The rules come from the technology, not from the layout, so a design retargeted to a different process is checked against that process's rules without anything being re-entered.

The rule kinds a technology can declare are minimum width, minimum spacing, minimum separation, minimum enclosure, minimum overlap and metal density; each names the layer (or the layer pair) it applies to and the value it requires. .ctech files carry them, so a kit's own rules arrive with the kit.

EM Layer: Metal1 Technology: MMIC GaAs Unit: um Snap: 0.005 µm Shapes: 4 Instances: 0 Extent: 110 × 22 µm X: — Y: 0 20 40 60 80 100 120 -40 -20 0 20 40 60 Check Markers Checked against "MMIC GaAs". 3 error(s), 0 warning(s) — 2 rule(s) over 4 shape(s). Metal1 Min Spacing closer than 4 µm (unnamed ↔ unnamed) -1.728, 10 µm Metal1 Min Spacing closer than 4 µm (unnamed ↔ unnamed) 68, 10 µm Metal1 Min Width narrower than 4 µm 40.002, 4 µm EM Layer: Metal1 Technology: MMIC GaAs Unit: um Snap: 0.005 µm Shapes: 4 Instances: 0 Extent: 110 × 22 µm X: — Y: 0 20 40 60 80 100 120 -40 -20 0 20 40 60 Check Markers Checked against "MMIC GaAs". 3 error(s), 0 warning(s) — 2 rule(s) over 4 shape(s). Metal1 Min Spacing closer than 4 µm (unnamed ↔ unnamed) -1.728, 10 µm Metal1 Min Spacing closer than 4 µm (unnamed ↔ unnamed) 68, 10 µm Metal1 Min Width narrower than 4 µm 40.002, 4 µm
A design-rule check on the MMIC starter process: a 2 um neck breaking minimum width and a 2 um gap breaking minimum spacing, listed in the DRC panel and marked on the artwork.

Each violation says which rule it broke, between which shapes, and by how much — and clicking one zooms the canvas to it. Markers draw over the offending geometry and can be toggled off. The header always names the technology that was checked against: a clean result against the wrong process looks exactly like a clean result against the right one, which is why the panel never leaves it to be inferred.

A violation can be waived, with a reason. A waived hit stays in the list, greyed and counted separately, rather than disappearing — a known exception you can still see is worth more than a clean report you cannot trust.

DRC is the geometry; LVS is the netlist

The DRC checks the geometry against the process rules, and the connectivity it computes internally exists to tell one net's shapes from another's. Whether the artwork implements the schematic — every device there once, every net whole and separate, every terminal on the right net, every value in agreement — is a different check with a different engine: see layout versus schematic. A board can pass either one and fail the other.

The toolbar

EM Layer: L1/0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 EM Layer: L1/0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
Layout editor toolbar
#ButtonWhat it does
1Zoom to Fit (F)
2Zoom Box (Z) — drag a box to zoom to it (Esc cancels; Ctrl+ +/- steps)
3Zoom Out
4Select
5Rectangle
6Rounded Rectangle
7Circle (center-radius)
8Polygon (double-click/Enter to close, Backspace removes last vertex)
9Path (trace)
10Label
11Via: this technology's stackup has no via layer — draw geometry on a via/drill layer directly instead.
12Port — click a conductor end to place an EM port (auto-numbered)
13Ruler (D) — click two points to measure (Shift locks to 0/45/90°; Ctrl+K clears every ruler)
14Insert Bitmap…
15Rotate 90° CCW (R)
16Rotate 90° CW (Shift+R)
17Mirror Horizontal (M)
18Mirror Vertical (Shift+M)
19Instance… (place a cell reference)
20Footprint… (place an SMT land pattern)
21Show PCell pins
22Geometry snap (F3 / S)
23Snap to intersections
24Save layout (Ctrl+S)
25Push Into Cell (Ctrl+])
26Pop Out (Ctrl+[)
27Check Design Rules (Ctrl/⌘+Shift+K)
28 EM EM EM Setup for this layout — opens it, creating it the first time
29Show EM cross-section mesh
30Show full-wave surface mesh
31Export GDSII…
32Export DXF…
33Export Gerber…
34Layer:
35—no tooltip

The groups, left to right: the drawing tools, which include the Ruler; the edit and boolean operations; the geometry snap toggles — the magnet and the intersections toggle described above; the hierarchy navigation (push in, pop out); EM setup and results, which sit here rather than among the drawing tools because all three are the same subject; and save.

See also: Schematic Editor · Symbol Editor · Units · PCells · EM Setup · File formats · wBond.