Grid & Connectivity

Connecting components must be easy, and connections must be unambiguous: "do these two pins touch?" has to have exactly one answer. circuitRF achieves both with **two grids** — a coarse connection grid that all electrical points snap to, and a fine authoring grid for everything cosmetic.

The two grids

	Connection grid `P`	Authoring grid `p`
Default pitch	100 units (the classic 100-mil EDA pitch)	5 units (`p = P/20`)
Job	electrical connection	cosmetic placement
What snaps to it	component pins, wire endpoints, wire bends, junction dots	symbol body art, label offsets, net-label positions, canvas objects
Can you change it?	fixed for a design (design-level)	freely, anytime (cosmetic)

Every electrically-connectable point lands on P exactly — an integer multiple, verified by arithmetic, not by tolerance. Everything that carries no electrical meaning lives on the finer p, which is always a refinement of P (p = P/k), so a point on P is always also on p. A connection point can never fall "between" cells.

Why two grids

One grid can't serve both masters. "Easy to connect" wants a coarse grid (few, well-spaced targets a wire snaps to cleanly); "freedom to place art and labels" wants a fine grid. Splitting them resolves the conflict: pins/wires/dots on coarse P so connection is trivial and exact; bodies/labels/decorations on fine p so authoring has room.

Counter-intuitive but important

Authoring freedom is controlled by p, not P. Making P finer does not give more freedom — it makes connection harder (targets get denser, easier to snap to the wrong one) and breaks the 100-mil convention every EDA tool and RF engineer assumes. Want finer placement? Shrink p (increase k). Leave P = 100.

Connection is exact equality

Two pins are connected if and only if their connection-grid coordinates are equal — not "within a few pixels." Because placement, wire drawing, and dragging all snap to P at the moment of input, coincident points are bit-for-bit equal, and the extracted netlist's connectivity is decided by exact grid coincidence. There is no fuzzy radius that could disagree with what you see on screen. This is what makes the netlist trustworthy: a connection, once made, is unambiguous.

A small junction dot is drawn only where incident wire segments form a real branch (a horizontal and a vertical segment meet). Three collinear segments overlapping draw no dot — but still read as connected.

Pasting across grids

If you copy from a schematic authored on a different connection grid and paste into one using P = 100, circuitRF detects, warns, and snaps:

The clipboard payload records the grid it was authored on.
On paste, if the source grid differs, you get a message — e.g. "Pasted content was created on a 50-unit grid; this schematic uses 100. Pins were snapped to this grid — verify connections."
Pasted pins, wire endpoints, and dots are snapped to the destination grid (as one undoable action); decorations snap to the fine grid. Internal coincidences within the pasted group are preserved where possible, and any point that can't land cleanly is reported — never a silent off-grid pin.

Changing the grids

Display grid (which lines are drawn) and the authoring grid p — cosmetic, change anytime. p is constrained to p = P/k (a refinement of P).
Connection grid P — fixed for a design. It is stored in the schematic file and is stable; changing it could strand existing connection points off the new grid, so it is treated as a deliberate migration, not a slider. In v1, P stays at the design's grid size; you change only p and the display.

The schematic editor

Everything above is enforced by the editor you draw in. Its canvas, its toolbar button by button, the Library Palette and how a component gets from one to the other are on their own page: The Schematic Editor.

See also: Schematic Editor · File formats (where the grid is stored) · Symbol Editor (pins on P, art on p). Full design: docs/design/grid-and-connectivity.md.